moecmks
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楼主  发表于: 2017-04-24 19:39
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先发 FX1S数据读报文，PLC接受到信号准备数据放到缓冲区。然后在用ReadFile从缓冲区接受一次报文。。。 30 MS左右
这时间正常吗？还是说我设置有问题？总感觉这样时间有点长啊。【工控菜鸟一个，放下代码求老鸟指点一二，有无能提升效率的地方。 ^_^】

复制代码
  1. #include <Windows.h>
  2. #include "codecb.h"
  3. #include "invariant.h"
  4. #include <assert.h>
  5. #include <tchar.h>
  6. #include "timing.h"
  8. extern HANDLE commport;
  10. _CRT_ALIGN (32)
  11. char ASCII_tonums_RVlut[0xFFFF+1];
  13. void build_ASC_RVlut (void)
  14. {
  15.   uint32_t ii;
  17.   static BOOL __init = FALSE;
  19.   if ( __init == TRUE) return;
  20.        __init  = TRUE;
  22.   ZeroMemory (ASCII_tonums_RVlut, sizeof (ASCII_tonums_RVlut));
  24.   for (ii = 0; ii != 0x10000; ii++) {
  25.    uint16_t lo = ii & 0x00FF;
  26.    uint16_t hi = ii >> 8;
  28.    if ( (( lo >= '0' && lo <= '9') || ( lo >= 'A' && lo <= 'F'))
  29.     && (( hi >= '0' && hi <= '9') || ( hi >= 'A' && hi <= 'F')))
  30.    {
  31.     if ( ( hi >= '0' && hi <= '9'))
  32.       ASCII_tonums_RVlut[ii] = hi - '0';
  33.     else if ( ( hi >= 'A' && hi <= 'F'))
  34.       ASCII_tonums_RVlut[ii] = hi - 'A' + 10;
  35.     if ( ( lo >= '0' && lo <= '9'))
  36.       ASCII_tonums_RVlut[ii] |= ( ( (unsigned) (lo - '0')) << 4);
  37.     else if ( ( lo >= 'A' && lo <= 'F'))
  38.       ASCII_tonums_RVlut[ii] |= ( ( (unsigned) (lo - 'A' + 10)) << 4);
  39.    }
  40.   }
  41. }
  44. BOOL comm_init (int comm_index)
  45. {
  46.   DCB dcbs;
  47.   COMMTIMEOUTS ct;  
  48.   BOOL success_io_;
  49.   TCHAR comm_buf0[256];
  50.   _stprintf (& comm_buf0[0], _T ("//./COM%i"), comm_index);
  52.   comm_close ();
  53.   commport = CreateFile ( & comm_buf0[0], GENERIC_READ | GENERIC_WRITE, 0,
  54.               NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL );
  55.   success_io_ = GetCommState (commport, & dcbs);
  56.   assert (success_io_ != FALSE);
  58.   dcbs.BaudRate = CBR_9600;
  59.   dcbs.fParity  = TRUE;
  60.   dcbs.Parity   = EVENPARITY;
  61.   dcbs.StopBits = ONESTOPBIT;
  62.   dcbs.ByteSize = 7;
  63.   dcbs.fDtrControl = DTR_CONTROL_DISABLE;
  64.   dcbs.fRtsControl = RTS_CONTROL_DISABLE;
  65.     
  66.   success_io_ = SetupComm (commport, 2048, 2048);
  67.   assert (success_io_ != FALSE);
  68.   success_io_ = SetCommState (commport, & dcbs);
  69.   assert (success_io_ != FALSE);
  71.   // SetTimeOut.
  72.   ct.ReadIntervalTimeout = 0x0000FFFF;
  73.   ct.ReadTotalTimeoutMultiplier = 0x0000FFFF;
  74.   ct.ReadTotalTimeoutConstant = 0xFFFFFFFE;
  75.   ct.WriteTotalTimeoutMultiplier = 0x0000FFFF;
  76.   ct.WriteTotalTimeoutConstant =   0xFFFFFFFE;  
  77.   
  78.   success_io_ = SetCommTimeouts (commport, &ct);  
  79.   assert (success_io_ != FALSE);
  81.   success_io_ = SetupComm (commport, 2400, 2400);  
  82.   assert (success_io_ != FALSE);
  84.   success_io_ = PurgeComm (commport, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR | PURGE_TXABORT);
  85.   assert (success_io_ != FALSE);
  87.   build_ASC_RVlut ();
  88.   
  89.   timing_init48 ();
  91.   INIT_WSCCRSEC__;
  92. }
  94. void comm_close (void)
  95. {
  96.   if (commport != INVALID_HANDLE_VALUE)
  97.   {
  98.     PurgeComm (commport, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR | PURGE_TXABORT);
  99.     CloseHandle (commport);
  100.   }
  101.   commport = INVALID_HANDLE_VALUE;
  102. }
  104. int8_t readOYB (int16_t e_addr) {
  106.   struct read_section2 rdsec;
  107.   char varsbuf[128];
  108.   int isr = 0;
  109.   int tm_numbs = 0;
  110.   uint16_t rv_numbs = 0;
  112.   BOOL io_success_;
  113.   DWORD rv_numbs2 = 0;
  115.   /* prepare Output-register read_section. */
  116.   isr = fx1s_makersecb ( & rdsec, FX1S_REGISTER_FIELD_Y_OUT,
  117.         & rv_numbs, FX1S_VERSION_30MR, e_addr);
  118.   assert (isr == FX1S_OK);
  119.   /* write Output-register read-code. */
  120.   io_success_ = WriteFile (commport, & rdsec,
  121.      sizeof(struct read_section), & tm_numbs, NULL);
  122.   assert (io_success_ != FALSE);
  123.   assert (tm_numbs == sizeof(struct read_section));
  124.   io_success_ = ReadFile  (commport, & varsbuf[0], rv_numbs, & rv_numbs2, NULL);
  125.   assert (io_success_ != FALSE);
  126.   assert (rv_numbs2 == rv_numbs);
  127.   assert (varsbuf[0] == SECTION_LINK_STX);
  128.   return ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]];
  129. }
  131. void setOYB (int16_t e_addr, int8_t val) {
  133.   char varsbuf[128];
  134.   int isr = 0;
  135.   int tm_numbs = 0;
  136.   uint16_t rv_numbs = 0;
  138.   BOOL io_success_;
  139.   DWORD rv_numbs2 = 0;
  141.   /* prepare Output-register write_section. */
  142.   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_Y_OUT,
  143.               & rv_numbs, FX1S_VERSION_30MR, e_addr);
  144.   assert (isr == FX1S_OK);
  145.   /* write Output-register write-code. */
  146.   io_success_ = WriteFile (commport, & varsbuf[0],
  147.      rv_numbs, & tm_numbs, NULL);
  148.   assert (io_success_ != FALSE);
  149.   assert (rv_numbs == tm_numbs);
  150.   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);
  151.   assert (io_success_ != FALSE);
  152.   assert (rv_numbs2 == 1);
  153.   assert (varsbuf[0] == SECTION_LINK_ACK);
  154. }
  156. static __forceinline
  157. int8_t readRELAY_M (int16_t addr) {
  159.   struct read_section2 rdsec;
  160.   char varsbuf[128];
  161.   int isr = 0;
  162.   int tm_numbs = 0;
  163.   uint16_t rv_numbs = 0;
  165.   BOOL io_success_;
  166.   DWORD rv_numbs2;
  168.   isr = fx1s_makersecb ( & rdsec, FX1S_REGISTER_FIELD_M,
  169.         & rv_numbs, FX1S_VERSION_14MR, addr);
  170.   assert (isr == FX1S_OK);
  171.   io_success_ = WriteFile (commport, & rdsec,
  172.      sizeof(struct read_section), & tm_numbs, NULL);
  173.   assert (io_success_ != FALSE);
  174.   assert (tm_numbs == sizeof(struct read_section));
  175.   io_success_ = ReadFile  (commport, & varsbuf[0], rv_numbs, & rv_numbs2, NULL);
  176.   assert (io_success_ != FALSE);
  177.   assert (rv_numbs2 == rv_numbs);
  178.   assert (varsbuf[0] == SECTION_LINK_STX);
  179.   return ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]];
  180. }
  182. static  __forceinline
  183. void writeRELAY_M (uint16_t addr, int8_t val) {
  185.   char varsbuf[128];
  186.   int isr = 0;
  187.   int tm_numbs = 0;
  188.   uint16_t rv_numbs = 0;
  190.   BOOL io_success_;
  191.   DWORD rv_numbs2;
  193.   /* prepare Output-register write_section. */
  194.   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_M,
  195.               & rv_numbs, FX1S_VERSION_14MR, addr);
  196.   assert (isr == FX1S_OK);
  197.   /* write Output-register write-code. */
  198.   io_success_ = WriteFile (commport, & varsbuf[0],
  199.      rv_numbs, & tm_numbs, NULL);
  200.   assert (io_success_ != FALSE);
  201.   assert (rv_numbs == tm_numbs);
  202.   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);
  203.   assert (io_success_ != FALSE);
  204.   assert (rv_numbs2 == 1);
  205.   assert (varsbuf[0] == SECTION_LINK_ACK);
  206. }
  208. void plc_force_close_ (void) {
  210.   BYTE obt;
  211.     /* force close PLC [by M8037]  **/
  212.     obt = readRELAY_M (8037);
  213.     writeRELAY_M (8037, obt | 0x20);
  214. }
  216. void plc_force_open_ (void) {
  218.   BYTE obt;
  219.   /* force open PLC [by M8035/M8036/M8037]  **/
  220.   obt = readRELAY_M (8037);
  221.   obt &= ~(1 << (8037 & 7));
  222.   writeRELAY_M (8037, obt);
  224.   obt = readRELAY_M (8035);
  225.   obt |= (11 << (8035 & 7));
  226.   writeRELAY_M (8035, obt);
  227. }
  229. void plc_set_pulse235_ (uint32_t val) {
  231.   int isr = 0;
  232.   char varsbuf[128];
  233.   uint16_t rv_numbs = 0;
  234.   DWORD rv_numbs2 = 0;
  235.   DWORD rv_numbs3 = 0;
  237.   BOOL io_success_;
  239.   isr = fx1s_makewsecb (& varsbuf[0], & val, FX1S_REGISTER_FIELD_C32,
  240.               & rv_numbs, FX1S_VERSION_14MR, PULSE_ENCODER_ADDR);
  241.   assert (isr == FX1S_OK);
  243.   rv_numbs2 = rv_numbs;
  244.   io_success_ = WriteFile (commport, & varsbuf[0], rv_numbs, & rv_numbs3, NULL);
  245.   assert (io_success_ != FALSE);
  246.   assert (rv_numbs2 == rv_numbs3);
  247.   io_success_ = ReadFile  (commport, & varsbuf[0], 1, & rv_numbs2, NULL);
  248.   assert (io_success_ != FALSE);
  249.   assert (rv_numbs2 == 1);
  250.   assert (varsbuf[0] == SECTION_LINK_ACK);
  251. }
  253. uint32_t plc_get_pulse235_ (void) {
  255.   union {
  256.     char bgroup[4];
  257.     int32_t inter;
  258.   } cc_timing;
  260.   BOOL io_success_;
  261.   DWORD rv_numbs = 0;
  262.   BYTE varsbuf[128];
  264.   io_success_ = WriteFile (commport, & g_crs2_pulse235.rsc, sizeof (struct read_section), & rv_numbs, NULL);
  265.   assert (io_success_ != FALSE);
  266.   assert (rv_numbs == sizeof (struct read_section));
  267.   io_success_ = ReadFile  (commport, & varsbuf [0], g_crs2_pulse235.rsc_cnt, & rv_numbs, NULL);
  268.   assert (io_success_ != FALSE);
  269.   assert (rv_numbs == g_crs2_pulse235.rsc_cnt);
  270.   assert (varsbuf[0] == SECTION_LINK_STX);
  271.   assert (varsbuf[9] == SECTION_LINK_ETX);
  273.   cc_timing.bgroup[0] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[1]];
  274.   cc_timing.bgroup[1] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[3]];
  275.   cc_timing.bgroup[2] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[5]];
  276.   cc_timing.bgroup[3] = ASCII_tonums_RVlut[ *(uint16_t *)& varsbuf[7]];
  278.   return cc_timing.inter;
  279. }
moecmks
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1楼  发表于: 2017-04-24 19:48
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FX1S 报文编解码
复制代码
  1. /*-
  2. * Copyright (c) 2017 moecmks
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. *    notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. *    notice, this list of conditions and the following disclaimer in the
  12. *    documentation and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17. * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRCMD, STRICT
  22. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24. * SUCH DAMAGE.
  25. *
  26. */
  28. #if !defined (codec_included_MOECMKS)
  29. #define codec_included_MOECMKS
  31. /*
  32. * fx1s read/write codec.
  33. * simple, each read a current register size unit memory
  34. * more information, please refer to the PLC manual and Internet resources.
  35. */
  36. #if defined (__cplusplus)  /** __cplusplus */
  37. extern "C" {
  38. #endif  /** __cplusplus */
  40. /* Portable fixed length ***/
  41. #include "stdint.h"
  43. /*
  44. * errror code
  45. */
  46. #define FX1S_RANGE 1
  47. #define FX1S_FAIL 2
  48. #define FX1S_KFAIL 3
  49. #define FX1S_UNKN 4
  50. #define FX1S_LIMIT 5
  51. #define FX1S_NAK 6
  52. #define FX1S_ACK 7
  53. #define FX1S_PARA 8
  54. #define FX1S_INCOP 9
  55. #define FX1S_OK 0
  57. /*
  58. * version control
  59. */
  60. enum FX1S_VERSION {
  61.   FX1S_VERSION_10MR = 0,
  62.   FX1S_VERSION_14MR,
  63.   FX1S_VERSION_20MR,
  64.   FX1S_VERSION_30MR,
  65.   FX1S_VERSION_OVERFLAGS
  66. };
  68. /*
  69. * register field.
  70. * Ignore T bit register and set register.
  71. * Ignore C bit register
  72. */
  73. enum FX1S_REGISTER_FIELD {
  74.   FX1S_REGISTER_FIELD_S = 0,
  75.   FX1S_REGISTER_FIELD_X,
  76.   FX1S_REGISTER_FIELD_Y_OUT,
  77.   FX1S_REGISTER_FIELD_Y_PLS,
  78.   FX1S_REGISTER_FIELD_D,
  79.   FX1S_REGISTER_FIELD_T,
  80.   FX1S_REGISTER_FIELD_M,
  81.   FX1S_REGISTER_FIELD_C16,
  82.   FX1S_REGISTER_FIELD_C32,
  83.   FX1S_REGISTER_FIELD_CRESET
  84. };
  86. /*
  87. * section .link code
  88. */
  89. #define SECTION_LINK_STX 0x02 /* PLC info-section begin flags. */
  90. #define SECTION_LINK_ETX 0x03 /* PLC info-section end flags .***/
  91. #define SECTION_LINK_EOT 0x03 /* .***/
  92. #define SECTION_LINK_ENQ 0x05 /* PLC only test enable */
  93. #define SECTION_LINK_ACK 0x06 /* PLC reply "can do" */
  94. #define SECTION_LINK_LF 0x0A /* .***/
  95. #define SECTION_LINK_CL 0x0C /* .***/
  96. #define SECTION_LINK_CR 0x0D /* .***/
  97. #define SECTION_LINK_NAK 0x15 /* PLC reply "bad things" */
  99. /*
  100. * section cmdion.
  101. */
  102. #define SECTION_CMD_READ      '0' /* .***/
  103. #define SECTION_CMD_WRITE     '1' /* .***/
  104. #define SECTION_CMD_FORCE_ON  '7' /* .***/
  105. #define SECTION_CMD_FORCE_OFF '8' /* .***/
  107. /*
  108. * read section
  109. */
  110. struct read_section {
  111.   uint8_t stx; /* read_section's stdhead. always SECTIOM_LINK_STX */
  112.   uint8_t cmd; /* read_section's cmd  always SECTIOM_CMD_READ  */
  113.   uint8_t unit_address[4];  /* read_section's address*/
  114.   uint8_t numb[2];          /* read's byte count. simple always one */
  115.   uint8_t etx;    /* read_section's stdend.   always SECTION_LINK_ETX  */
  116.   uint8_t crc[2]; /* correcting code*/
  117. };
  119. /*
  120. * read section2
  121. */
  122. struct read_section2 {
  123.   uint8_t stx; /* read_section's stdhead. always SECTIOM_LINK_STX */
  124.   uint8_t cmd; /* read_section's cmd  always SECTIOM_CMD_READ  */
  125.   uint8_t unit_address[4];  /* read_section's address*/
  126.   uint8_t numb[2];          /* read's byte count. simple always one */
  127.   uint8_t etx;    /* read_section's stdend.   always SECTION_LINK_ETX  */
  128.   uint8_t crc[2]; /* correcting code*/
  129.   uint8_t crce; /* easy to read..**/
  130.   uint16_t opbsize; /******/
  131.   uint8_t opboff; /* for bit register(X, Y, M.) **/
  132.   uint16_t opbaddr; /* easy to read. **/
  133. };
  135. /*
  136. * write section
  137. */
  138. struct write_section {
  139.   uint8_t stx; /* write_section's stdhead.  always SECTIOM_LINK_STX */
  140.   uint8_t cmd; /* write_section's cmd  always SECTIOM_CMD_WRITE   */
  141.   uint8_t unit_address[4]; /* write_section's address*/
  142.   uint8_t numb[2]; /* write's byte count.. must <= 64  */
  143.   uint8_t etx; /* write_section's stdend. */
  144.   uint8_t crc[2]; /* correcting code*/
  145.   uint8_t crce; /* easy to read..**/
  146.   uint8_t obpoff; /* for bit register(X, Y, M.) **/
  147.   uint16_t opbaddr; /* easy to read. **/
  148. };
  150. /*
  151. * force section
  152. */
  153. struct force_section {
  154.   uint8_t stx; /* force_section's stdhead.  always SECTIOM_LINK_STX */
  155.   uint8_t cmd; /* force_section's cmd  always SECTIOM_CMD_FORCE_OFF or SECTIOM_CMD_FORCE_ON   */
  156.   uint8_t unit_address[4]; /* force_section's address*/
  157.   uint8_t etx; /* force_section's stdend. */
  158.   uint8_t crc[2]; /* correcting code*/
  159. };
  161. /*
  162. * Accept the write section is very simple,
  163. * if successful send SECTION_LINK_ACK otherwise SECTION_LINK_NAK
  164. */
  165. int fx1s_makersecb (struct read_section2 *rsec, /* write to the serial port, use the size of the read_section */
  166.                          enum FX1S_REGISTER_FIELD rf, uint16_t  *rvap_size,
  167.                          enum FX1S_VERSION ver, uint16_t address);
  168. int fx1s_makewsecb (void *wsec, /* Variable size structure, so use void *, please understand **/
  169.                    void *spval,
  170.                          enum FX1S_REGISTER_FIELD rf, uint16_t  *wsec_size,
  171.                          enum FX1S_VERSION ver, uint16_t address);
  172. int fx1s_makefsecb (struct force_section *fsec,
  173.                          enum FX1S_REGISTER_FIELD rf,
  174.                          enum FX1S_VERSION ver, uint16_t address);            
  176. #if defined (__cplusplus)  /** __cplusplus */
  177. }
  178. #endif  /** __cplusplus */
  180. #endif /* codec_included_MOECMKS */
moecmks
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2楼  发表于: 2017-04-24 19:52
只看该作者 | 小 中 大
复制代码
  1. /*-
  2. * Copyright (c) 2017 moecmks
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. *    notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. *    notice, this list of conditions and the following disclaimer in the
  12. *    documentation and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17. * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24. * SUCH DAMAGE.
  25. *
  26. */
  28. #include <assert.h>
  29. #include <string.h>
  30. #include "codecb.h"
  32. /* Convert characters to specific number - noexport */
  33. static
  34. char ascii_to_num (char ch) {
  35.   /* e.g.
  36.    *  source '9' -> target 9
  37.    *  source 'A' -> target 10
  38.    *  source '1' -> target 1
  39.    *  source 'a' -> (nondone, Don't use lowercase letters in fx1s-14mr-001).
  40.    */
  41.   if (ch >= '0' && ch <= '9')
  42.     return (ch - '0');
  43.   if (ch >= 'A' && ch <= 'F')
  44.     return (ch - ('A' - 10));
  45.   else
  46.     assert (0);
  48.   return ch;
  49. }
  51. /* Convert number to specific characters - noexport */
  52. static
  53. char num_to_ascii (char ch) {
  54.   /* e.g.
  55.    *  source 9 -> target '9'
  56.    *  source A -> target '0'
  57.    *  source 1 -> target '1'
  58.    *  source a -> (nondone, Don't use lowercase letters in fx1s-14mr-001).
  59.    */
  60.   if (ch >= 0x00 && ch <= 0x09)
  61.     return (ch + '0');
  62.   if (ch >= 0x0A && ch <= 0x0F)
  63.     return (ch + ('A' - 10));
  64.   else
  65.     assert (0);
  67.   return ch;
  68. }
  71. /* XXX:L-endian.
  72. */
  74. static
  75. uint16_t vailed8 (uint16_t nums) {
  76.   
  77.   /* e.g.
  78.    * 1234 vailed.
  79.    * 9000 invailed.
  80.    * 1007 vailed.
  81.    * 1811 invailed.
  82.    * 0 ~ 65535
  83.    */
  84.    uint16_t d0 = nums % 10 >> 0;
  85.    uint16_t d1 = nums % 100 / 10;
  86.    uint16_t d2 = nums % 1000 / 100;
  87.    uint16_t d3 = nums % 10000 / 1000;
  88.   
  89.    if ( d0 > 7 || d1 > 7)
  90.      return -1;
  91.    if ( d2 > 7)
  92.      return -1;
  93.    return d0 + d1 * 8 + d2 * 8 * 8 + d3 * 8 * 8 * 8;
  94. }
  96. static
  97. uint8_t fxcrc_adjust (unsigned char *crcbuf, uint32_t num) {
  98.   
  99.   uint32_t s= 0;
  100.   uint32_t st = 0;
  101.   
  102.   for (; s != num; s++)
  103.     st += crcbuf[s];
  104.   /* we only save lowest bit's byte **/
  105.   return st & 0xFF;
  106. }
  108. static /* we not check numb cross register **.**/
  109. uint32_t fxcalc_addru (enum FXREGS_FIELD reg, uint16_t addr,
  110.                            enum FX1S_VERSION ver,
  111.                            uint16_t  *opbsize,
  112.                                 uint16_t *raddr, unsigned char *dboff) {
  113.   
  114.   static const /* XXX:enum constant dependence **/
  115.                    uint16_t xmax_tab[4] = { 6, 8, 12, 16 };
  116.   static const /* XXX:enum constant dependence **/
  117.                    uint16_t ymax_tab[4] = { 4, 6, 8, 14 };
  118.   uint16_t addr0 = 0x00A0;
  119.   uint16_t eig = vailed8 (addr);
  120.   uint8_t off = -1;
  121.   uint32_t opbsize0 = 2;
  123.   switch (reg) {
  124.     
  125.   case FX1S_REGISTER_FIELD_D:
  126.   
  127.     if (addr <= 127 && addr == addr) /* numbers: 128, normal use */
  128.       addr0 = 0x1000 + addr * 2;
  129.     else if (addr <= 255) /* numbers: 128, save use */
  130.       addr0 = 0x1000 + addr * 2;
  131.     else if (addr >= 1000 && addr <= 2499)  /* numbers: 1500, file register */
  132.       addr0 = 0x1000 + addr * 2;
  133.     else if (addr >= 8000 && addr <= 8255) /* numbers: 256, special IO port */
  134.       addr0 = 0x0E00 + (addr - 8000) * 2;
  135.     else  /* Illegal access */
  136.       return FX1S_RANGE;
  137.     break;
  139.   case FX1S_REGISTER_FIELD_X:
  141.     /*
  142.      * Check the number of available X-coils according to the PLC version
  143.      */
  144.     if ((eig = vailed8 (addr)) == -1
  145.      || (eig >= xmax_tab[ver]) )
  146.       return FX1S_PARA;
  147.       
  148.     addr0 = 0x0080 + eig / 8;
  149.     off = eig & 7;
  150.     
  151.     opbsize0 = 1;
  152.     break;
  153.     
  154.   case FX1S_REGISTER_FIELD_Y_PLS:
  155.     addr0 += 0x0200;
  156.   case FX1S_REGISTER_FIELD_Y_OUT:
  157.   
  158.     /*
  159.      * Check the number of available Y-coils according to the PLC version
  160.      */
  161.     if ((eig = vailed8 (addr)) == -1)
  162.       return FX1S_PARA;
  163.     
  164.     addr0 += eig / 8;
  165.     off = eig & 7;
  166.     
  167.     opbsize0 = 1;
  168.     break;
  170.   case FX1S_REGISTER_FIELD_S:
  171.   
  172.     if ((addr >=  128)) /* numbers:128, status register **/
  173.       return FX1S_RANGE;
  175.     addr0 = addr / 8;
  176.     off = addr & 7;
  177.     
  178.     opbsize0 = 1;
  179.     break;
  180.   
  181.   case FX1S_REGISTER_FIELD_T:
  182.   
  183.     if ( (addr <=  63)) /* numbers:64, 100ms or 10ms M8028/D8030/D8031 **/
  184.       addr0 = 0x0800 + addr * 2;
  185.     else    
  186.       return FX1S_RANGE;
  187.     break;
  188.     
  189.   case FX1S_REGISTER_FIELD_M:
  190.   
  191.     if (addr < 384) /* numbers: 384, normal use */
  192.       addr0 = 0x0100 + addr / 8;
  193.     else if (addr < 512) /* numbers: 512, save use */
  194.       addr0 = 0x0100 + addr / 8;
  195.     else if (addr >= 8000 && addr < 8256) /* numbers: 256, special IO port */
  196.       addr0 = 0x01E0 + (addr - 8000) / 8;
  197.     else /* Illegal access */
  198.       return FX1S_RANGE;
  199.     
  200.     off = addr & 7;
  201.     opbsize0 = 1;
  202.     break;
  203.   
  204.   case FX1S_REGISTER_FIELD_C16:
  205.   
  206.     if (addr < 16) /* numbers: 16, normal use */
  207.       addr0 = 0x0A00 + addr * 2;
  208.     else if (addr < 32) /* numbers: 16, save use */
  209.       addr0 = 0x0A00 + addr * 2;
  210.     else /* Illegal access */
  211.       return FX1S_RANGE;
  212.     break;
  213.     
  214.   case FX1S_REGISTER_FIELD_C32:
  215.   
  216.    /* for C32 high speed registers,
  217.     * we only perform some basic checks, please note
  218.     **/
  219.     if (addr > 200 && addr <= 255)
  220.       addr0 = 0x0C00 + (addr - 200) * 4;
  221.     else /* Illegal access */
  222.       return FX1S_RANGE;
  223.       
  224.     opbsize0 = 4;
  225.     break;
  226.   
  227.   case FX1S_REGISTER_FIELD_CRESET:
  228.   
  229.     if (addr <= 255)
  230.       addr0 = 0x03C0 + addr / 8;
  231.     else /* Illegal access */
  232.       return FX1S_RANGE;
  233.       
  234.     opbsize0 = 1;
  235.     break;
  236.     
  237.   default:
  238.       return FX1S_PARA;
  239.   }
  240.   
  241.   *raddr = addr0;
  242.   *dboff = off;
  243.   *opbsize = opbsize0;
  244.   return FX1S_OK;
  245. }
  247. int fx1s_makersecb (struct read_section2 *rsec, /* write to the serial port, use the size of the read_section */
  248.                          enum FX1S_REGISTER_FIELD rf, uint16_t  *rvap_size,
  249.                          enum FX1S_VERSION ver, uint16_t address)
  250. {
  251.   struct read_section2 sec;
  252.   uint32_t e;
  253.   
  254.   /** phase 1:fill stdhead/stdend flags and cmd, rread count,s */
  255.   sec.stx = SECTION_LINK_STX;
  256.   sec.etx = SECTION_LINK_ETX;
  257.   sec.cmd = SECTION_CMD_READ;
  259.   /** phase 2:calc address for register and current PLC version */
  260.   e = fxcalc_addru (rf, address, ver, & sec.opbsize, & sec.opbaddr, & sec.opboff);
  261.   if (e != FX1S_OK)
  262.     return e;
  263.   else
  264.    *rvap_size = sizeof (sec.stx) +
  265.                 sizeof (sec.crc)+ sizeof (sec.etx) + sec.opbsize * 2;
  267.   /** phase 3:fill numb ascii, * */
  268.   sec.numb[0] = num_to_ascii ( (sec.opbsize  & 0xF0) >>4);
  269.   sec.numb[1] = num_to_ascii ( (sec.opbsize  & 0x0F) >>0);
  270.   
  271.   /** phase 4:fill address ascii, * */
  272.   sec.unit_address[0] = num_to_ascii ( (sec.opbaddr  & 0xF000) >>12);
  273.   sec.unit_address[1] = num_to_ascii ( (sec.opbaddr  & 0x0F00) >> 8);
  274.   sec.unit_address[2] = num_to_ascii ( (sec.opbaddr  & 0x00F0) >> 4);
  275.   sec.unit_address[3] = num_to_ascii ( (sec.opbaddr  & 0x000F) >> 0);
  276.   
  277.   /** phase 5:crc adjust, fill ascii buf * */
  278.   sec.crce = fxcrc_adjust (& sec.cmd, sizeof (sec.cmd) + sizeof (sec.unit_address)
  279.                                         + sizeof (sec.numb)
  280.                                         + sizeof (sec.etx));
  281.   sec.crc[0] = num_to_ascii ( (sec.crce  & 0xF0) >> 4);
  282.   sec.crc[1] = num_to_ascii ( (sec.crce  & 0x0F) >> 0);
  283.   
  284.   memcpy (rsec, & sec, sizeof (sec));
  285.   return FX1S_OK;  
  286. }
  288. int fx1s_makewsecb (void *wsec, /* Variable size structure, so use void *, please understand **/
  289.                    void *buf, /* wsec size == sizeof(wc) * 2  **/
  290.                          enum FX1S_REGISTER_FIELD rf, uint16_t *wsec_size,
  291.                          enum FX1S_VERSION ver, uint16_t address)
  292. {
  293.   uint16_t opbsize, opbaddr;
  294.   char obpoff;
  295.   char varsbuf[256];
  296.   char *as = buf, cs;
  297.   uint32_t e;
  298.   uint32_t s = 0;
  299.   struct write_section *secp = wsec;
  300.   struct write_section *secdp = (void *)varsbuf;
  302.   /** phase 1:fill stdhead flags and cmd */
  303.   secdp->stx = SECTION_LINK_STX;
  304.   secdp->cmd = SECTION_CMD_WRITE;
  306.   /** phase 2:calc address for register and current PLC version */
  307.   e = fxcalc_addru (rf, address, ver, & opbsize, & opbaddr, & obpoff);
  308.   if (e != FX1S_OK)
  309.     return e;
  310.   else
  311.     *wsec_size = sizeof (struct write_section) + opbsize * 2;
  313.   /** phase 3:fill numb ascii, * */
  314.   secdp->numb[0] = num_to_ascii ( (opbsize  & 0xF0) >>4);
  315.   secdp->numb[1] = num_to_ascii ( (opbsize  & 0x0F) >>0);
  316.   
  317.   /** phase 4:fill address ascii, * */
  318.   secdp->unit_address[0] = num_to_ascii ( (opbaddr  & 0xF000) >>12);
  319.   secdp->unit_address[1] = num_to_ascii ( (opbaddr  & 0x0F00) >> 8);
  320.   secdp->unit_address[2] = num_to_ascii ( (opbaddr  & 0x00F0) >> 4);
  321.   secdp->unit_address[3] = num_to_ascii ( (opbaddr  & 0x000F) >> 0);
  322.   
  323.   /** phase 5:fill variable buffer, * */
  324.   for ( ; s != opbsize; s++) {
  325.     unsigned char  temp = as[s];
  326.     char  tmphi = num_to_ascii (temp >> 4);
  327.     char  tmplo = num_to_ascii (temp & 15);
  328.     
  329.     secdp->numb[2+s*2+0] = tmphi;
  330.     secdp->numb[2+s*2+1] = tmplo;
  331.   }
  333.   /** phase 6:crc adjust, fill ascii buf * */
  334.   secdp->numb[2+opbsize*2] = SECTION_LINK_ETX;
  335.   
  336.   cs = fxcrc_adjust (& secdp->cmd, opbsize * 2 + sizeof (secp->cmd) + sizeof (secp->unit_address)
  337.                                         + sizeof (secp->numb)
  338.                                         + sizeof (secp->etx));
  339.   secdp->numb[2+opbsize*2+1] = num_to_ascii ( (cs  & 0xF0) >> 4);
  340.   secdp->numb[2+opbsize*2+2] = num_to_ascii ( (cs  & 0x0F) >> 0);
  341.   
  342.   memcpy (wsec, & varsbuf, *wsec_size);
  343.   return FX1S_OK;
  344. }
  346. uint32_t fx1s_cmprvpack (void *raccbuf, /* Variable size structure, so use void *, please understand **/
  347.                          uint16_t rc, void **ascii_buf, uint16_t *opbsize
  348.                          , uint16_t *stdpos)
  349. {
  350.   char *varsbuf = raccbuf;
  351.   uint16_t c = 0;
  352.   char stx_find = 0;
  353.   uint16_t stdpos0 = -1;
  354.   
  355.   /* we find SECTION_LINK_NAK or SECTION_LINK_STX at first **/
  356.   for (; c != rc; c++)
  357.    {
  358.      if (varsbuf[c] == SECTION_LINK_NAK)
  359.        return FX1S_NAK;
  360.      if (varsbuf[c] == SECTION_LINK_STX)
  361.       {
  362.         /* second, we check SECTION_LINK_ETX in buffer **/
  363.         stx_find = 1;
  364.         stdpos0 = c + 1;
  365.       }  
  366.      if (varsbuf[c] == SECTION_LINK_ETX && stx_find == 1)
  367.       {
  368.         /* exist CRC byte ??**/
  369.         if ((c + 2) >= rc)
  370.           return FX1S_INCOP;
  371.         /* calculate, compare the CRC code **/
  372.         {
  373.       # if 0
  374.       # else
  375.           *ascii_buf = & varsbuf[stdpos0];
  376.           *opbsize = c - stdpos0;
  377.           *stdpos = stdpos0;
  378.           return FX1S_OK;
  379.       # endif    
  380.         }
  381.       }
  382.    }
  383.   
  384.    return FX1S_INCOP;
  385. }                    
  387. uint32_t fx1s_decrvsec (void *raccbuf, void *sbuf, uint16_t opbasize) {
  388.   
  389.   char *varsbuf = raccbuf;
  390.   char *ssbuf = sbuf;
  391.   uint16_t c = 0;
  392.   
  393.   if (opbasize % 2 == 1)
  394.     return FX1S_INCOP;
  395.   if (opbasize == 0)
  396.     return FX1S_PARA;
  397.   
  398.   for ( ; c != opbasize; c += 2)
  399.     {
  400.       char tmphi = ascii_to_num (varsbuf[c]) << 4;
  401.       char tmplo = ascii_to_num (varsbuf[c+1]);  
  402.       char temp  =   (tmphi & 0xF0) |    (tmplo & 0x0F);
  403.       
  404.       ssbuf[c>>1] = temp;
  405.     }
  406.     
  407.     return FX1S_OK;
  408. }